SemiXthon

This track focuses on developing environmentally responsible electronic systems that reduce energy consumption, minimize waste, and promote sustainability throughout the product lifecycle.

Solutions may target power electronics, low-power embedded systems, renewable integration, smart energy management, or eco-friendly hardware design.

Judging Criteria: 
- Environment Impact  (15 Marks) : Carbon Footprint Reduction, Waste reduction
- Material and Components Choices (15 Marks) : Recycled or reusable, Avoidance of toxic components
- Energy Efficiency   (15 Marks) : Low Power Consumption
- Lifecycle  (15 Marks) : Repairability, Ease of maintenance 
- Hardware (Bonus Marks) (Optional)

Sustainable & Green Electronics

Earl

Viscount

This track emphasizes electronics and embedded hardware solutions aimed at improving healthcare delivery, diagnosis, monitoring, or wellness.

Projects should demonstrate realistic medical or assistive use-cases, focusing on affordability, safety, and usability.

Judging Criteria:
- Clinical Relevance ( 25 Marks) : Clear medical or wellness use case, Target user defined ( doctor, patient )
- Accuracy & Data Quality  ( 20 marks )  : Repeatability of results, Sensor precision                       
- Safety and Reliability (In case of hardware) ( 15 marks) : Electrical safety, Thermal safety, Failure mode
- Cost & Accessibility ( 15 marks) : Price Cap : 5k 
- Hardware (Bonus Marks) (Optional)

Healthcare

This track focuses on improving interaction between humans and electronic systems through innovative interfaces.

Projects may involve sensory inputs, gesture recognition, haptics, assistive interfaces, or intuitive control mechanisms.

Judging Criteria:
- Cost & Accessibility ( 40  MARKS) : Afford components, Accessibility for population group including elderly and disable
- Safety & Reliability ( 30  MARKS) : Electrical safety, Thermal safety, Error handling
- Accuracy & Responsiveness ( 30 marks ) : Low Latency, Consistent Performance                                                      
- Hardware Implementation (Bonus Marks) (Optional)

Human Device Interface

This track focuses on designing military-grade, mission-critical communication systems where reliability, security, and robustness are paramount.

Teams are expected to conceptualize and prototype defense-oriented communication hardware suitable for harsh environments, adversarial conditions, and real-time operations.

Projects should emphasize hardware-backed communication, fault tolerance, and secure data transmission rather than consumer-grade networking solutions.

Note: Software-only or purely conceptual solutions are discouraged. Hardware feasibility and system design are critical.

Expected Focus Area:
- Secure wired/wireless communication systems
- Anti-jamming and interference-resistant designs
- Encrypted communication hardware
- Battlefield sensor networks
- Tactical radios or command-control systems
- Redundant and fail-safe communication architectures

Judging Criteria:
- System Robustness & Reliability (20 Marks) : Performance under noise, Interference, Partial Failures
- Security & Defense Relevance (20 Marks) : Encryption, Authentication, Resistance to attacks
- Latency & Real-Time Performance (15 Marks) : Suitability for time-critical operations
- Scalability & Network Architecture (10 Marks) : Multi-node hierarchical communication systems
- Hardware Implementation (Bonus Marks) (Optional) : Prototype quality, Signal Integrity, Originality


Communication

This track emphasizes backend-oriented digital design and VLSI concepts, focusing on architecture, RTL design, verification, timing, and physical design awareness.

Projects should demonstrate a strong understanding of how digital systems are actually built and optimized at the hardware level.

The emphasis is on core logic, datapaths, control units, and backend flows.

Expected Focus Areas:
- RTL design (Verilog/System Verilog/VHDL)
- Processor or accelerator microarchitecture
- Backend-aware design (timing, area, power)
- FPGA prototyping of backend logic
- Verification, testbenches, and assertions
- ASIC-oriented design concepts (synthesis, timing closure, floorplanning awareness)

Judging Criteria:
- Architecture & RTL Quality (25 Marks) : Correctness, Modularity, Clarity of Design
- Backend Awareness & Optimization (20 Marks) : Timing Considerations, Area Considerations, Power Considerations
- Verification & Validation (15 Marks) : Testbenches, Simulation Results, Corner Cases
- Design Complexity & Scalability (10 Marks) : Expandability, Architectural Soundness
- Hardware/FPGA Demonstration (Bonus Marks) (Optional)

Digital Design and VLSI

Any innovative hardware solution not covered above

Must be Electronic Centric

Software-only projects are not allowed

Judging Criteria:
- Innovation & Creativity (25 Marks)
- Technical Depth (25 Marks)
- Practical Feasibility (25 Marks)
- User Impact (25 Marks)
- Hardware Implementation (Bonus Marks) (Optional)

Open Track

Note : Do not select this track or else your team submission will not be considered.

Offline Track for Round 3.
(For Final Round Only)

Judging Criteria:
- Efficiency (25 Marks)
- Practicality / Usability (25 Marks)
- User Experience / Responsive (25 Marks)
- Scalability (25 Marks)
- Hardware (Bonus Marks)

SemiXthon

SemiXthon

SemiXthon$1,167

SemiXthon

$709: Main Track

$76: Sustainable & Green Electronics

$76: Healthcare

$76: Human Device Interface

$76: Communication

$76: Digital Design and VLSI

$76: Open Track

SemiXthon$1,167

SemiXthon

$709: Main Track

$76: Sustainable & Green Electronics

$76: Healthcare

$76: Human Device Interface

$76: Communication

$76: Digital Design and VLSI

$76: Open Track